1. Field of the Invention
The present invention relates to a semiconductor device capable of improving on-resistance and a manufacturing method thereof.
2. Discussion of the Related Art
Generally, a high-voltage (HV) metal oxide semiconductor (MOS) field effect transistor (MOSFET) has high input impedance compared to a bipolar transistor, and therefore may achieve a great power gain, and a simplified gate driving circuit structure. In addition, the MOSFET, which is a unipolar device, generally does not cause time delays due to accumulation or recombination of minority carriers during turn-off of the device.
Accordingly, the MOSFET is being applied more and more widely, for example, to a switching mode power supply, a lamp ballast, and a motor driving circuit. A double diffused MOSFET (DMOSFET) structure using a planar diffusion technology is widely used as a representative of power MOSFET devices.
FIG. 1 is a cross-sectional view of a general laterally diffused MOS (LDMOS) transistor. Referring to FIG. 1, the LDMOS transistor comprises a P-type epitaxial layer 110 formed on a semiconductor substrate, an embedded insulation layer 115 disposed at an upper part of the p-type epitaxial layer 110, a high-voltage N-type well (HV NWELL) 120 disposed at an upper part of the embedded insulation layer 115, a field oxide 125 formed on a surface of the semiconductor substrate to improve pressure resistance characteristics, a P-type body 130 formed in the high-voltage N-type well 120 and disposed on one side of the field oxide 125, a low-voltage N-type well 135 formed in the high-voltage N-type well 120 and disposed on the other side of the field oxide 125, a source region 140 formed in the P-type body 130 as doped with N+ impurities, a P+ source contact region 145 disposed adjacent to the source region 140, a drain region 150 disposed in the low-voltage N-type well 135 as doped with N+ impurities, a gate insulating layer 155 formed at an upper part of the semiconductor substrate, and a gate electrode 160 formed to cover the gate dielectric layer 155 and part of the field oxide 125.
The on-resistance characteristics and breakdown voltage characteristics of the LDMOS transistor depend on the thickness of the field oxide 130. Since the field oxide 130 is generally formed using a local oxidation of silicon (LOCOS) process to have a substantially uniform thickness substantially throughout the field oxide 130, it is almost impractical to adjust thickness of the LOCOS field oxide using the general LOCOS process to thereby control the device characteristics. That is, a dedicated process is additionally required to control the device characteristics.